This role is for one of the Weekday's clients Min Experience: 6+ years Location: India JobType: full-time Required Skills 6+ years of experience in ASIC/SoC emulation, pre-silicon validation, or verification Strong hands-on experience with Cadence Palladium emulation platforms (XP, Z1, Z2, or Z3) Deep understanding of Palladium compilation/build flows, including advanced clocking, ICE (In-Circuit Emulation), and Virtual Interface (VIF) flows Good to have in RTL languages: Verilog, SystemVerilog, VHDL Strong programming skills in SystemC, C/C++ for transactor development and reference modeling Expertise in scripting languages: Python, TCL, Perl, and Shell Experience with debugging tools and debugger interfaces (Lauterbach, JTAG, Coresight/UltraSoC) Knowledge of SoC architectures (ARM/x86) and standard protocols: PCIe, DDR/LPDDR, AXI, USB, SPI Good-to-Have Experience with additional emulation platforms such as ZeBu, Veloce, or Protium Experience with FPGA prototyping (HAPS, Xilinx) UVM verification experience and simulation regression debug Experience with networking ASICs, Ethernet, RDMA, RoCE, or AI fabrics Exposure to firmware validation, embedded software bring-up Must-have skills Silicon Validation, Palladium, ASIC/SOC Emulation Good-to-have skills Zebu, Veloce, Protium