Senior Mixed-Signal Verification Engineer – Power Management ICs
TYLsemi · 143 days ago
What You’ll Do
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Develop and execute mixed-signal verification plans for high-current IVR designs.
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Build and maintain analog behavioral models (Verilog-A / SystemVerilog real-number modeling) for power stages, integrated inductors, PDN, and analog blocks.
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Perform analog-digital co-simulation using industry-standard tools (Cadence Xcelium + Spectre, Synopsys VCS + FineSim / CustomSim, or AMS Designer).
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Verify digital control loops
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Create testbenches for key performance metrics: transient response (load steps), loop stability, efficiency, ripple, over-current / over-voltage protection, and startup/shutdown sequences.
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Run regressions across PVT corners, Monte-Carlo analysis, and corner-case scenarios.
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Debug mixed-signal issues at both transistor-level and behavioral level.
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Collaborate closely with analog designers, digital designers, and system engineers to close verification coverage.
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Develop automated verification scripts and improve verification methodology for faster turnaround.
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Support post-silicon validation by correlating simulation results with lab measurements.
What We’re Looking For
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5+ years of hands-on experience in mixed-signal verification of power management ICs or analog/mixed-signal SoCs.
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Strong proficiency in mixed-signal simulation flows:
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Real Number Modeling (RNM) and Verilog-A behavioral modeling
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Analog-digital co-simulation (AMS, VCS + Spectre, Xcelium)
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Solid understanding of power converter topologies (buck, multi-phase, 3-level buck, switched-capacitor converters).
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Good knowledge of digital control concepts for power converters (PID controllers, DPWM, digital feedback loops).
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Experience with MATLAB/Simulink for system-level modeling and testbench reference generation.
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Proficiency in SystemVerilog and UVM for digital/mixed-signal testbenches.
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Familiarity with Cadence Virtuoso, Spectre, or Synopsys CustomSim for analog simulation.
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Understanding of analog non-idealities (quantization effects, loop delay, sensor offsets, PDN resonances, inductor non-linearities).
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BSEE / MSEE with 8+ years relevant experience.
N********ice to Have
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Experience verifying high-frequency IVRs, PoL regulators, or high-current power delivery systems.
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Experience with SIMPLIS, PLECS, or Simulink for system-level power electronics validation.
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Familiarity with digital PID controller verification and fixed-point arithmetic effects.
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Exposure to advanced packaging and on-die inductor modeling.
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Scripting skills in Python, Perl, or Tcl for automation.
